In high-speed transmission of digital signals, differential signal transmission is generally performed. In some cases, the amplitude of the differential signal is very small. Thus, in a receiver that receives the differential signal, the signal is amplified using an amplifier and then the logical value thereof is identified using a clock signal which is generated using a clock generator. As the clock generator, for example, a clock data recovery (CDR) is used. The CDR generates a clock signal on the basis of a differential data signal which has been input into the CDR and identifies the logical value of the differential data signal at a timing that the clock signal rises or falls.
The logical value of a differential signal is identified by obtaining the value of a difference between the voltage value of one differential signal which is defined as a reference value and that of another differential signal. If the reference voltage of another differential signal deviates from the reference voltage of one differential signal owing to variations in manufacture of elements of amplifiers, a timing at which a difference value which is favorable and sufficient for identification of the logical value of the differential signal is not obtained will be generated and hence correct identification of the logical value of the differential signal will become difficult. Incidentally, the reference voltage means a central value of amplitudes of the voltage of each of the differential signals and a difference in the reference voltage between the differential signals is referred to as an offset.
A technique for increasing the degree of identification performed using a clock generator by adding an offset compensator that adjusts the reference voltage of an output signal from an amplifier such that maximum amplitude values of a positive-phase component and a negative-phase component of a differential signal become the same as each other is proposed, for examples, as disclosed in Japanese Laid-open Patent Publication No. 05-218773. In the above mentioned technique, the offset compensator is an analog circuit. The analog circuit may be influenced by noise such as noise generated from a power source. If the offset compensator is influenced by the noise, difference will occur in the adjusting amounts of reference voltages.